Listar AC - Artículos por centro "E.T.S.I. Informática"
Mostrando ítems 1-20 de 50
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A CUDA approach to compute perishable inventory control policies using value iteration.
(Springer Nature, 2018)Dynamic programming (DP) approaches, in particular value iteration, is often seen as a method to derive optimal policies in inventory management. The challenge in this approach is to deal with an increasing state space ... -
Accelerating Sequence Alignments Based on FM-Index Using the Intel KNL Processor
(IEEE/ACM TRANSACTIONS ON COMPUTATIONAL BIOLOGY AND BIOINFORMATICS,, 2020-07-01)FM-index is a compact data structure suitable for fast matches of short reads to large reference genomes. The matching algorithm using this index exhibits irregular memory access patterns that cause frequent cache misses, ... -
Advanced Quantization Schemes to Increase Accuracy, Reduce Area, and Lower Power Consumption in FFT Architectures.
(IEEE, 2024)This paper explores new advanced quantization schemes for fast Fourier transform (FFT) architectures. In previous works, FFT quantization has been treated theoretically or with the sole aim of improving accuracy. In this ... -
Advancements in long-read genome sequencing technologies and algorithms
(Elsevier, 2024-03)The recent advent of long read sequencing technologies, such as Pacific Biosciences (PacBio) and Oxford Nanopore technology (ONT), have led to substantial improvements in accuracy and computational cost in sequencing ... -
A Comparative Analysis of STM Approaches to Reduction Operations in Irregular Applications
As a recently consolidated paradigm for optimistic concurrency in modern multicore architectures, Transactional Memory (TM) can help to the exploitation of parallelism in irregular applications when data dependence ... -
Comparing assembly strategies for third-generation sequencing technologies across different genomes
(Elsevier, 2023-09)The recent advent of long-read sequencing technologies, such as Pacific Biosciences (PacBio) and Oxford Nanopore technology (ONT), has led to substantial accuracy and computational cost improvements. However, de novo ... -
CPU and GPU oriented optimizations for LiDAR data processing
(Elsevier, 2024-07)Digital Terrain Models (DTM) can be accurately obtained from clouds of LiDAR points but the corresponding cloud processing time can be prohibitive. This paper describes several optimization techniques that have been applied ... -
Design optimization of a 3-stage membrane cascade for oligosaccharides purification using mixed integer non-linear programming.
(2020)Inhomogeneous membrane cascade systems have been utilized to purify fructooligosaccharides (FOS). Such a process allows a different setup at every stage of the cascade. Varying the setup at every stage implies an optimization ... -
Designing a Project for Learning Industry 4.0 by Applying IoT to Urban Garden
(2019-10-11)The fast evolution of technologies forces teachers to trade content off for self-learning. Project-based learning (PBL) is one of the best ways to promote self-learning and simultaneously boost motivation. In this paper, ... -
Efficient floating-point givens rotation unit
(2020-10-23)High-throughput QR decomposition is a key operation in many advanced signal processing and communication applications. For some of these applications, using floating-point computation is becoming almost compulsory. However, ... -
Efficient heterogeneous matrix profile on a CPU + High Performance FPGA with integrated HBM
(Elsevier, 2021-12)In this work, we study the problem of efficiently executing a state-of-the-art time series algorithm class – SCAMP – on a heterogeneous platform comprised of CPU + High Performance FPGA with integrated HBM (High Bandwidth ... -
Energy-based tuning of convolution neural networks on multi-GPUs
(Wiley, 2019-11)Deep Learning (DL) applications are gaining momentum in the realm of Artificial Intelligence, particularly after GPUs have demonstrated remarkable skills for accelerating their challenging computational requirements. Within ... -
Energy-based tuning of metaheuristics for molecular docking on multi-GPUs
(Wiley, 2018-09)Virtual Screening (VS) methods simulate molecular interactions in silico to look for the best chemical compound that interacts with a given molecular target. VS is becoming increasingly popular to accelerate the drug ... -
Enhancing Scalability In Best-Effort Hardware Transactional Memory Systems
(Elsevier, 2017)Current industry proposals for hardware transactional memory focus on best-effort solutions where hardware limits are imposed on transactions. These designs can efficiently execute transactions but they may abort due to ... -
Experiments with Active-Set LP Algorithms Allowing Basis Deficiency
(IOAP-MDPI, 2022-12-23)n interesting question for linear programming (LP) algorithms is how to deal with solutions in which the number of nonzero variables is less than the number of rows of the matrix in standard form. An approach is that of ... -
Exploring multiprocessor approaches to time series analysis
(Elsevier, 2024-02-08)A time series is a chronologically ordered set of samples of a real-valued variable that can have millions of observations. Time series analysis seeks extracting models in a large variety of domains [31] such as epidemiology, ... -
Fast HUB Floating-point Adder for FPGA
(2018-10-17)Several previous publications have shown the area and delay reduction when implementing real number computation using HUB formats for both floating-point and fixed-point. In this paper, we present a HUB floating-point ... -
Genome Sequence Alignment - Design Space Exploration for Optimal Performance and Energy Architectures
(IEEE Transactions on Computers, 2021-12)Next generation workloads, such as genome sequencing, have an astounding impact in the healthcare sector. Sequence alignment, the first step in genome sequencing, has experienced recent breakthroughs, which resulted in ... -
Hardware Signature Designs to Deal With Asymmetry in Transactional Data Sets
(IEEE, 2013)Transactional Memory (TM) systems must track memory accesses made by concurrent transactions in order to detect conflicts. Many TM implementations use signatures for this purpose, which summarize reads and writes in ... -
High-Radix Formats for Enhancing Floating-Point FPGA Implementations
(Springer, 2021-12-02)This article proposes a family of high-radix floating-point representation to efficiently deal with floating-point addition in FPGA devices with no native floating-point sup port. Since variable shifter implementation ...