This article proposes a family of high-radix floating-point representation to efficiently deal with floating-point addition in FPGA devices with no native floating-point sup port. Since variable shifter implementation ...

This brief presents a hardware design to achieve high-throughput QR decomposition, using Givens Rotation Method. It utilizes a new two-dimensional systolic array architecture with pipelined processing elements, which are ...

Hardware transactional memory is a new parallel programming paradigm supported by current commercial multiprocessors. This paradigm provides optimistic concurrency and overcomes some of the problems associated with classical ...

The use of Graphics Processing Units to accelerate computational applications is increasingly being adopted due to its affordability, flexibility and performance. However, achieving top performance comes at the price of ...

In hardware transactional memory, signatures have been proposed to keep track of memory locations accessed in a transaction to help conflict detection. Generally, signatures are implemented as Bloom filters that suffer ...

La Memoria Transaccional (TM) ofrece un modelo de ejecución concurrente optimista en arquitecturas multinúcleo, permitiendo a los programadores extraer paralelismo cuando la información de las dependencias de datos no está ...

Lung cancer has a high prevalence and mortality due to its late diagnosis and limited treatment, so it is essential to find biomarkers that allow a faster diagnosis and improve the survival of these patients. In this sense, ...

This paper evaluates how fusing multimodal features (audio, RGB, and depth) can enhance the task of gait recognition, as well as gender and shoe recognition. While most previous research has focused on visual descriptors ...

Compulsory normalization of the represented numbers is a key requirement of the floating-point standard. This requirement contributes to fundamental characteristics of the standard, such as taking the most of the precision ...