Listar Arquitectura de Computadores - (AC) por tipo "info:eu-repo/semantics/submittedVersion"
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A cross-dataset deep learning-based classifier for people fall detection and identification
Delgado-Escaño, Rubén; Castro, Francisco M.; Ramos-Cózar, Julián
; Marín-Jiménez, Manuel J.; Guil-Mata, Nicolás; Casilari-Pérez, Eduardo[et al.] (Elsevier, 2020)
This paper addresses the issue of fall detection, particularly for elderly individuals who may live alone and be unable to call for help after a fall. The objective is to develop a deep learning-based approach that can ... -
Enabling Fast and Energy-Efficient FM-index Exact Matching using Processing-Near-Memory
Herruzo-Ruiz, José Manuel; Fernández, Iván; González-Navarro, Sonia; Óscar, Plata (Springer, 2021-09)
Memory bandwidth and latency constitutes a major performance bottleneck for many data-intensive applications. While high-locality access patterns take advantage of the deep cache hierarchies available in modern processors, ... -
Enhancing Scalability In Best-Effort Hardware Transactional Memory Systems
Quislant-del-Barrio, Ricardo; Gutiérrez-Carrasco, Eladio Damián; López-Zapata, Emilio; Plata-González, Óscar Guillermo (Elsevier, 2017)
Current industry proposals for hardware transactional memory focus on best-effort solutions where hardware limits are imposed on transactions. These designs can efficiently execute transactions but they may abort due to ... -
Genome Sequence Alignment - Design Space Exploration for Optimal Performance and Energy Architectures
Qureshi, Yasir Mahmood; Herruzo-Ruiz, José Manuel; Zapater, Marina; Olcoz, Katzalin; González-Navarro, Sonia; Óscar, Plata; Atienza, David[et al.] (IEEE Transactions on Computers, 2021-12)
Next generation workloads, such as genome sequencing, have an astounding impact in the healthcare sector. Sequence alignment, the first step in genome sequencing, has experienced recent breakthroughs, which resulted in ... -
Improving Hardware Transactional Memory Parallelization of Computational Geometry Algorithms Using Privatizing Transactions.
Quislant-del-Barrio, Ricardo; Gutiérrez-Carrasco, Eladio Damián; López-Zapata, Emilio; Plata-González, Óscar Guillermo (Elsevier, 2019-05-06)
Hardware transactional memory is a new parallel programming paradigm supported by current commercial multiprocessors. This paradigm provides optimistic concurrency and overcomes some of the problems associated with classical ... -
Leveraging Irrevocability to Deal with Signature Saturation in Hardware Transactional Memory
Quislant-del-Barrio, Ricardo; Gutiérrez-Carrasco, Eladio Damián; López-Zapata, Emilio; Plata-González, Óscar Guillermo (Springer, 2017)
In hardware transactional memory, signatures have been proposed to keep track of memory locations accessed in a transaction to help conflict detection. Generally, signatures are implemented as Bloom filters that suffer ... -
On an OptLearn implementation using collaborative filtering.
Fuster López, Alejandro; Guerrero-García, Pablo; Hendrix, Eligius María Theodorus; Martínez-Cruz, Jesús; Nowak, Ivo (2023)
The aim of the iMath project is to develop a recommender system where a student is recommended a next question or literature in a learning platform MathE. This paper describes the systems developed based on collaborative ... -
On conceptualisation and an overview of learning path recommender systems in e-learning.
Fuster López, Alejandro; Martínez-Cruz, Jesús; Guerrero-García, Pablo; Hendrix, Eligius María Theodorus; Košir, Andrej; Nowak, Ivo; Oneto, Luca; Sirmakessis, Spiros; Pacheco, Maria Fátima; Fernandes, Florbela Pires; Pereira, Ana Isabel[et al.] (2024-06-10)
The use of e-learning systems has a long tradition, where students can study online helped by a system. In this context, the use of recommender systems is relatively new. In our research project, we investigated various ... -
On order policies with pre-specified order schedules for a perishable product in retail.
This paper studies a retail inventory system for a perishable product, based on a practical setting in Dutch retail. The product has a fixed shelf life of three days upon delivery at the store and product demand has a ... -
Privatizing Transactions for Lee's Algorithm in Commercial Hardware Transactional Memory
Quislant-del-Barrio, Ricardo; Gutiérrez-Carrasco, Eladio Damián; López-Zapata, Emilio; Plata-González, Óscar Guillermo (Springer, 2018)
Lee’s algorithm solves the path-connection problems that arise in logical drawing, wiring diagramming or optimal route finding. Its parallel version has been widely used as a benchmark to test transactional memory systems. ...