Listar Arquitectura de Computadores - (AC) por título
Mostrando ítems 95-114 de 205
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HPC Accelerators with 3D Memory
Ujaldon-Martínez, Manuel
(2016-09-13)
After a decade evolving in the High Performance Computing arena, GPU-equipped supercomputers have con- quered the top500 and green500 lists, providing us unprecedented levels of computational power and memory bandwidth. ... -
HUB meets posit: arithmetic units implementation
Murillo, Raul; Hormigo-Aguilar, Javier; del Barrio, Alberto A.; Botella, Guillermo (IEEE, 2023)
The posit (TM) format was introduced in 2017 as an alternative to replacing the widespread IEEE 754. Posit arithmetic provides reproducible results across platforms and possesses tapered accuracy, among other improvemen ... -
iDA: Preservando el acceso a bases de datos a muy largo plazo.
El proyecto iDA (Immortal Database Accesss) tiene como objetivo el ofrecer una visión general de las posibilidades tecnológicas para la preservación de los sistemas informáticos desmantelados (decommissioned) y los datos ... -
Implementaciones paralelas para un problema de control de inventarios de productos perecederos
Gutiérrez-Alcoba, Alejandro; Hendrix, Eligius María Theodorus; García-Fernández, Inmaculada; Ortega, Gloria L. (2015-10-05)
En este trabajo se analizan y eval uan dos implementaciones de un algoritmo de optimizaci on para un problema de control de inventarios de productos perecederos. Las implementaciones se han llevado a cabo utilizando ... -
Improvements in Hardware Transactional Memory for GPU Architectures
Villegas Fernández, Alejandro; Asenjo-Plaza, Rafael; González-Navarro, María Ángeles; Plata-González, Óscar Guillermo (2016-07-20)
In the multi-core CPU world, transactional memory (TM)has emerged as an alternative to lock-based programming for thread synchronization. Recent research proposes the use of TM in GPU architectures, where a high number of ... -
Improving Fixed-Point Implementation of QR Decomposition by Rounding-to-Nearest
Muñoz, Sergio D.; Hormigo-Aguilar, Javier (2015-06-29)
QR decomposition is a key operation in many current communication systems. This paper shows how to reduce the area of a fixed-point QR decomposition implementation based on Givens rotations by using a new number ... -
Improving Hardware Transactional Memory Parallelization of Computational Geometry Algorithms Using Privatizing Transactions.
Quislant-del-Barrio, Ricardo; Gutiérrez-Carrasco, Eladio Damián; López-Zapata, Emilio; Plata-González, Óscar Guillermo (Elsevier, 2019-05-06)
Hardware transactional memory is a new parallel programming paradigm supported by current commercial multiprocessors. This paradigm provides optimistic concurrency and overcomes some of the problems associated with classical ... -
Improving Signatures by Locality Exploitation for Transactional Memory
Quislant-del-Barrio, Ricardo; Gutiérrez-Carrasco, Eladio Damián; Plata-González, Óscar Guillermo; López-Zapata, Emilio (IEEE, 2009)
Writing multithreaded programs is a fairly complex task that poses a major obstacle to exploit multicore processors. Transactional Memory (TM) emerges as an alternative to the conventional multithreaded programming to ... -
Improving Transactional Memory Performance for Irregular Applications
Pedrero-Luque, Manuel; Gutiérrez-Carrasco, Eladio Damián; Romero-Montiel, Sergio; Plata-González, Óscar Guillermo (2015-06-11)
Transactional memory (TM) offers optimistic concurrency support in modern multicore archi- tectures, helping the programmers to extract parallelism in irregular applications when data dependence information is not available ... -
Insights into the Fallback Path of Best-Effort Hardware Transactional Memory Systems
Quislant-del-Barrio, Ricardo; Gutiérrez-Carrasco, Eladio Damián; Zapata, Emilio L.; Plata-González, Óscar Guillermo (Springer International Publishing, 2016-08-24)
Current industry proposals for Hardware Transactional Memory (HTM) focus on best-effort solutions (BE-HTM) where hardware limits are imposed on transactions. These designs may show a significant performance degradation ... -
Inteligencia Artificial en biomedicina
(UMA Editorial, 2024)En esta tesis doctoral vamos a realizar un recorrido por los distintos pasos del flujo de trabajo de la Inteligencia Artificial aplicado a la biomedicina. Desde la recolección de datos y su etiquetado, su análisis mediante ... -
Introduccion a OpenCL
(2014-05-12)Este curso ofrecerá una introducción a OpenCL en el contexto de C y sus aplicaciones científicas. OpenCL proporciona el acceso a estos nuevos recursos computacionales y una forma coherente de utilizarlos para resolver ... -
An Introduction to Intel Threading Building Blocks and its Support for Heterogeneous Programming
Asenjo-Plaza, Rafael; Cownie, Jim; Fedotov, Aleksei (2018-03-12)
Due to energy constraints, high performance computing platforms are becoming increasingly heterogeneous, achieving greater performance per watt through the use of hardware that is tuned to specific computational kernels ... -
Inventory control for a non-stationary demand perishable product: comparing policies and solution methods
Hendrix, Eligius María Theodorus; Pauls-Worm, Karin G.J. (2018-03-02)
This paper summarizes our findings with respect to order policies for an inventory control problem for a perishable product with a maximum fixed shelf life in a periodic review system, where chance constraints play a role. ... -
Irregular alignment of arbitrarily long DNA sequences on GPU
Perez-Wohlfeil, Esteban; Trelles-Salazar, Oswaldo Rogelio; Guil-Mata, Nicolás (Springer Nature, 2022-12-22)
The use of Graphics Processing Units to accelerate computational applications is increasingly being adopted due to its affordability, flexibility and performance. However, achieving top performance comes at the price of ... -
Irrevocabilidad Relajada para Memoria Transaccional Hardware
Quislant-del-Barrio, Ricardo; Gutiérrez-Carrasco, Eladio Damián; Zapata, Emilio L.; Plata-González, Óscar Guillermo (2016-09-20)
Los sistemas comerciales que ofrecen memoria transaccional (TM) implementan un sistema hardware best-effort (BE-HTM) con limitaciones. Es necesario programar un fallback software basado en cerrojos para asegurar el progreso ... -
Lazy Irrevocability for Best-Effort Transactional Memory Systems
Quislant-del-Barrio, Ricardo; Gutiérrez-Carrasco, Eladio Damián; López-Zapata, Emilio; Plata-González, Óscar Guillermo (IEEE, 2017)
IBM and Intel now offer commercial systems with Transactional Memory (TM), a programming paradigm whose aim is to facilitate concurrent programming while maximizing parallelism. These TM systems are implemented in hardware ... -
Leveraging Irrevocability to Deal with Signature Saturation in Hardware Transactional Memory
Quislant-del-Barrio, Ricardo; Gutiérrez-Carrasco, Eladio Damián; López-Zapata, Emilio; Plata-González, Óscar Guillermo (Springer, 2017)
In hardware transactional memory, signatures have been proposed to keep track of memory locations accessed in a transaction to help conflict detection. Generally, signatures are implemented as Bloom filters that suffer ... -
Lightweight asynchronous scheduling in heterogeneous reconfigurable systems
Rodríguez-Moreno, Andrés; González-Navarro, María Ángeles; Nikov, Kris; Nunez-Yanez, José; Gran-Tejero, Rubén; Suárez Gracia, Darío; Asenjo-Plaza, Rafael[et al.] (Elsevier, 2022-03)
The trend for heterogeneous embedded systems is the integration of accelerators and general-purpose CPU cores on the same die. In these integrated architectures, like the Zynq UltraScale+ board (CPU+FPGA) that we target ... -
Localizando partículas en un fluido a partir de holografías y computación de altas prestaciones
Ortega, Gloria L.; Lobera, Julia; García-Fernández, Inmaculada; Arroyo, Maria del Pilar; Garzón, Ester M. (2014-09-24)
La tomografía se ha introducido recientemente en la velocimetría de fluidos para proporcionar información en tres dimensiones de la localización de partículas en el seno de fluidos. En concreto, algunos trabajos previos ...