Listar Arquitectura de Computadores - (AC) por título
Mostrando ítems 127-146 de 198
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New formats for computing with real-numbers under round-to-nearest
(2015-09-17)In this paper, a new family of formats to deal with real number for applications requiring round to nearest is proposed. They are based on shifting the set of exactly represented numbers which are used in conventional ... -
New Results on Non-normalized Floating-point Formats
(IEEE Computer Society, 2019)Compulsory normalization of the represented numbers is a key requirement of the floating-point standard. This requirement contributes to fundamental characteristics of the standard, such as taking the most of the precision ... -
Normalizing or not normalizing? An open question for floating-point arithmetic in embedded systems
(IEEE, 2017-07-24)Emerging embedded applications lack of a specific standard when they require floating-point arithmetic. In this situation they use the IEEE-754 standard or ad hoc variations of it. However, this standard was not designed ... -
Novel parallel approaches to efficiently solve spatial problems on heterogeneous CPU-GPU systems
(UMA Editorial, 2022)In recent years, approaches that seek to extract valuable information from large datasets have become particularly relevant in today's society. In this category, we can highlight those problems that comprise data analysis ... -
On an OptLearn implementation using collaborative filtering.
(2023)The aim of the iMath project is to develop a recommender system where a student is recommended a next question or literature in a learning platform MathE. This paper describes the systems developed based on collaborative ... -
On computational procedures for Value Iteration in inventory control
(2019-09-11)Dynamic programming (DP) is often seen in inventory control to lead to optimal ordering policies. When considering stationary demand, Value Iteration (VI) may be used to derive the best policy. In this paper, our focus is ... -
On conceptualisation and an overview of learning path recommender systems in e-learning.
(2024-06-10)The use of e-learning systems has a long tradition, where students can study online helped by a system. In this context, the use of recommender systems is relatively new. In our research project, we investigated various ... -
On how to improve tracklet-based gait recognition systems
(Elsevier, 2015-12-15)Abstract Recently, short-term dense trajectories features (DTF) have shown state-of-the-art results in video recognition and retrieval. However, their use has not been extensively studied on the problem of gait recognition. ... -
On order policies with pre-specified order schedules for a perishable product in retail.
(2023)This paper studies a retail inventory system for a perishable product, based on a practical setting in Dutch retail. The product has a fixed shelf life of three days upon delivery at the store and product demand has a ... -
On the parallelization of a three-parametric log-logistic estimation algorithm
(2014-09-25)Networked telerobots transmit data from its sensors to the remote controller. To provide guarantees on the time requirements of these systems it is mandatory to keep the transmission time delays below a given threshold, ... -
Optimización de la Entrada Salida mediante librerías y lenguajes paralelos
(Servicio de Publicaciones y Divulgación Científica, 2016)Uno de los grandes retos de la HPC (High Performance Computing) consiste en optimizar el subsistema de Entrada/Salida, (E/S), o I/O (Input/Output). Ken Batcher resume este hecho en la siguiente frase: "Un supercomputador ... -
Optimization of massive data applications on heterogeneous architectures
(UMA Editorial, 2023-01)In the last few years, the heterogeneous architectures have become dominant in each part of the computing industry: from heterogeneous GPU accelerators joining multi-core CPUs within the same chip, to Systems on Chip that ... -
Optimizing DSP Circuits by a New Family of Arithmetic Operators
(2014-11-19)A new family of arithmetic operators to optimize the implementation of circuits for digital signal processing is presented. Thanks to use of a new technique which reduces the quantification errors, the proposed operators ... -
Pairwise and incremental multi-stage alignment of metagenomes: A new proposal
(Springer, 2017)Traditional comparisons between metagenomes are often performed using reference databases as intermediary templates from which to obtain distance metrics. However, in order to fully exploit the potential of the information ... -
Paralelismo de datos en la obtención de Tablas de Control de Tráfico con información de llegada
(2014-09-24)Los semáforos se pueden controlar de forma dinámica a través de varias reglas que dictaminan el color del semáforo segun el número de vehículos a la espera. Estas reglas o acciones se recogen en lo que se conoce como ... -
Paralelización Automática Basada en Memoria Transaccional
(Universidad de Málaga, Servicio de Publicaciones y Divulgación Científica, 2013)Con la aparición de los chips multiprocesador, la industria del hardware ha pasado la responsabilidad sobre la eficiencia de las aplicaciones a la comunidad de desarrolladores de software. La gran mayoría de programadores ... -
Path planning for socially-aware humanoid robots
(2019-04-11)Designing efficient autonomous navigation systems for mobile robots involves consideration of the robotís environment while arriving at a systems architecture that trades off multiple constraints. We have architected a ... -
Patrón pipeline aplicado a arquitecturas heterogéneas big.LITTLE
(2015-09-25)En este trabajo, proponemos una solución para permitir la ejecución de aplicaciones de tipo streaming, que constan de una serie de etapas, sobre arquitecturas heterogéneas con un multicore y una GPU integrada. Para ello, ... -
Performance Analysis of the Multi-pass Transformation for Complex 3D-Stencils on GPUs
(2013-09-25)Performance Analysis of the Multi-pass Transformation for Complex 3D-Stencils on GPUs -
Pipeline template for streaming applications on heterogeneous chips
(2015-09-07)We address the problem of providing support for executing single streaming applications implemented as a pipeline of stages that run on heterogeneous chips comprised of several cores and one on-chip GPU. In this paper, ...