Listar Arquitectura de Computadores - (AC) por título
Mostrando ítems 31-50 de 189
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C++ for Heterogeneous Programming: oneAPI (DPC++ and oneTBB)
(2020-11-19)This tutorial provides hands-on experience programming CPUs, GPUs and FPGAs using a unified, standards-based programming model: oneAPI. oneAPI includes a cross-architecture language: Data Parallel C++ (DPC++). DPC++ is an ... -
Clasificación Tisular en GPU: aceleración y optimizaciones
(Servicio de Publicaciones y Divulgación Científica, 2015)Desde hace una década, los procesadores gráficos o GPUs vienen ganando protagonismo en la computación de altas prestaciones, contribuyendo a la aceleración de miles de aplicaciones en multitud de áreas de la ciencia. Pero ... -
CodSim 2.0: Un Laboratorio Virtual para la Enseñanza de las Codificaciones de Datos
(SARTECO, 2021-09)Este artículo presenta la herramienta CodSim 2.0, un simulador de codificaciones de datos a nivel físico, dirigido a estudiantes de asignaturas de redes de computadores en grados en ingeniería Informática o Electrónica. El ... -
A Comparative Analysis of STM Approaches to Reduction Operations in Irregular Applications
As a recently consolidated paradigm for optimistic concurrency in modern multicore architectures, Transactional Memory (TM) can help to the exploitation of parallelism in irregular applications when data dependence ... -
Comparing assembly strategies for third-generation sequencing technologies across different genomes
(Elsevier, 2023-09)The recent advent of long-read sequencing technologies, such as Pacific Biosciences (PacBio) and Oxford Nanopore technology (ONT), has led to substantial accuracy and computational cost improvements. However, de novo ... -
Computational methods and parallel strategies in dynamic decision making
(UMA Editorial, 2018)Esta tesis analiza aplicaciones de toma de decisiones dinámica para un conjunto de problemas. Pueden diferenciarse dos líneas principales. La primera trata problemas de gestión de la cadena de suministro para productos ... -
Computer architecture simulation on the server-side for online evaluation purposes
(2021)Due to the global COVID19 pandemic, in the last few months there has been a dramatic change in the educational context where lecturers around the world has forced to solve academic problems that immediately before this ... -
Control y mejora de la coordinación entre asignaturas de una titulación universitaria
(2015-06-17)Entre las múltiples exigencias que impone el EEES, la mejora de la coordinación entre las asignaturas de una titulación es una de las que más preocupan, y se ha convertido en uno de los temas de debate más vivos en ... -
CPU and GPU oriented optimizations for LiDAR data processing
(Elsevier, 2024-07)Digital Terrain Models (DTM) can be accurately obtained from clouds of LiDAR points but the corresponding cloud processing time can be prohibitive. This paper describes several optimization techniques that have been applied ... -
CUVLE: Variable-Length Encoding on CUDA
(2014-10-14)Data compression is the process of representing information in a compact form, in order to reduce the storage requirements and, hence, communication bandwidth. It has been one of the critical enabling technologies for ... -
Decomposition methods for mixed-integer nonlinear programming
(UMA Editorial, 2021-11-05)La programación no lineal de enteros mixtos es un campo de optimización importante y desafiante. Este tipo de problemas pueden contener variables continuas e enteras, así como restricciones lineales y no lineales. Esta ... -
Designing a Project for Learning Industry 4.0 by Applying IoT to Urban Garden
(2019-10-11)The fast evolution of technologies forces teachers to trade content off for self-learning. Project-based learning (PBL) is one of the best ways to promote self-learning and simultaneously boost motivation. In this paper, ... -
Digit recurence division under HUB format
(2016-07-21)Half-Unit-Biased format is based on shifting the representation line of the binary numbers by half Unit in the Last Place. The main feature of this format is that the round to nearest is carried out by a simple truncation, ... -
Diseño del compilador de la máquina virtual inmortal iVM
(Sociedad de Arquitectura y Tecnología de Computadores (SARTECO), 2022-09-21)Conservar la información digital durante mucho tiempo es difı́cil, incluso cuando se utiliza un medio de almacenamiento pasivo duradero, como una pelı́cula fotográfica almacenada en las condiciones adecuadas. En dicho ... -
DNA Sequences Alignment in Multi-GPUs: Energy Payoff on Speculative Executions
(2017-05-30)We present a performance per watt analysis of CUDAlign 4.0, a parallel strategy to obtain the optimal alignment of huge DNA se- quences in multi-GPU platforms using the exact Smith-Waterman method. Speed-up factors and ... -
Edge AI Architectures for a Privacy-Preserving IoT Era
(2022-07-20)The Internet of Things (IoT) has been hailed as the next frontier of innovation where our everyday objects are connected in ways that improve our lives and transform industries, in particular healthcare. In this talk, Prof. ... -
Efficient floating-point givens rotation unit
(2020-10-23)High-throughput QR decomposition is a key operation in many advanced signal processing and communication applications. For some of these applications, using floating-point computation is becoming almost compulsory. However, ... -
Efficient Floating-Point Representation for Balanced Codes for FPGA Devices
(2013-10-30)We propose a floating–point representation to deal efficiently with arithmetic operations in codes with a balanced number of additions and multiplications for FPGA devices. The variable shift operation is very slow in ... -
Efficient heterogeneous matrix profile on a CPU + High Performance FPGA with integrated HBM
(Elsevier, 2021-12)In this work, we study the problem of efficiently executing a state-of-the-art time series algorithm class – SCAMP – on a heterogeneous platform comprised of CPU + High Performance FPGA with integrated HBM (High Bandwidth ... -
Efficient OpenCL-based concurrent tasks offloading on accelerators
(Procedia Computer Science, 2017)Current heterogeneous platforms with CPUs and accelerators have the ability to launch several independent tasks simultaneously, in order to exploit concurrency among them. These tasks typically consist of data transfer ...